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Modifying and extending the instruction set

A number of opcodes can be associated with individual instructions in the Intel instruction set. The opcodes specify different configurations of operands, operand sizes (8-bit, 16-bit, or 32-bit) and addressing modes for the instruction. We use XOR to illustrate these configurations as shown in Figure 3.5. A total of five additional forms of the XOR are created with the introduction of 32-bit processing. We extended the existing instructions in Sim286 to handle these additional forms for all instructions simulated.


  
Figure: The XOR Instruction: Each instruction in the Intel386 instruction set has multiple forms derived from different combinations of operands and addressing modes.
\begin{figure}
\begin{tex2html_preform}\begin{verbatim}Opcode Instruction Descri...
...to r/m dword\end{verbatim}\end{tex2html_preform}\rule{6.5in}{0.3mm}
\end{figure}

Sim8088 simulates the execution of 62 instructions and Sim286 simulates 3 additional instructions. In Sim386, we added the LEAVE, HLT, and extended IMUL instructions. The LEAVE and HLT instructions are part of the process termination code. The HLT instruction stops instruction execution and places the Intel 386 processor in a HALT state. The LEAVE instruction releases the stack space used by a procedure for its local variables. These instructions are needed to allow the executable program inputed into the simulator, an ELF binary, to exit gracefully. The extended IMUL instruction is a useful form of the IMUL instruction utilized by many input programs, and was not in the set of instructions implemented by Sim286.


next up previous contents
Next: Modifying the registers, segments, Up: Adding 32-bit processing Previous: Adding additional addressing modes
Michael L. Haungs
1998-09-21